The interface trap density of fresh TiN/TaN gated HfO2/SiO 2/Si/epi-Ge pMOSFETs is measured using the DCIV technique. Its temperature dependence is also discussed here. We observe a polarity dependent DCIV peak shift. The bias temperature stress induced interface trapped charge and oxide trapped charge shifts are also systematically investigated in this work. ©2009 IEEE.

Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique

GIUSI, Gino;
2009-01-01

Abstract

The interface trap density of fresh TiN/TaN gated HfO2/SiO 2/Si/epi-Ge pMOSFETs is measured using the DCIV technique. Its temperature dependence is also discussed here. We observe a polarity dependent DCIV peak shift. The bias temperature stress induced interface trapped charge and oxide trapped charge shifts are also systematically investigated in this work. ©2009 IEEE.
2009
9781424438310
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11570/2749576
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